Wafer test apparatus including optical elements and method of using the test apparatus

ABSTRACT

Wafer-level testing is performed on an electronic device to be used in an optical communications system. An optical test signal is generated and is provided to a first photo detector. An electrical output of the first photo detector is supplied to the electronic device on the wafer. An electrical output from the electronic device on the wafer is used to drive a light source. An optical output of the light source is supplied to a second photo detector and an electrical signal output from the second photo detector is examined.

BACKGROUND OF THE INVENTION

[0001] Field of the Invention

[0002] The present invention is concerned with testing wafers on whichelectronic circuits are formed, and is more particularly concerned withtesting electronic circuits used in optical communications systems.

[0003] It is well known to apply tests to electronic circuits formed onsemiconductor wafers. A purpose of such testing is to determine whetherthe electronic circuits had been properly manufactured to perform theirdesired functions.

[0004] Some types of integrated circuits (ICs) are manufactured for usein optical communications systems.

[0005]FIG. 1 is a schematic illustration of a conventional arrangementin which an electronic IC 10 is utilized in an optical communicationssystem. The electronic IC 10 is coupled between a photo detector 12which provides an electrical input signal for the electronic IC 10, anda light source 14 which is driven by an electrical signal from theelectronic IC 10. The electronic IC 10 has receiver functions thatrespond to the electrical input signal from the photo detector 12, andtransmitter functions that produce the electrical signal which drivesthe light source 14. The photo detector 12 may be a PIN diode or anavalanch photo detector (APD). The light source 14 may be an LED (lightemitting diode) or a laser.

[0006] Typically electronic ICs manufactured for optical communicationsare not produced on the same wafer with optical elements becausedifferent manufacturing processes are required for the electroniccircuits and the optical elements. Instead, after testing, each diecontaining an electronic IC is cut from its wafer and then packaged withassociated optical elements.

[0007] According to conventional practices, during testing of theelectronic IC die on a wafer, the photo detector with which the IC is tobe packaged is simulated by using a current source in parallel with acapacitor. A resistor is conventionally used to simulate the lightsource that the electronic IC is intended to drive.

[0008] However, there are significant differences in performance betweenthe actual optical elements and the circuit elements conventionally usedto simulate them during wafer testing. As a result, tests that would bedesirable to perform on a wafer cannot be carried out. For example, thefrequency performance of a PIN diode is dependent on the incidentoptical power. When the incident optical power is at a high level, thebandwidth of the PIN diode is reduced. Conventional electronic circuitsused in optical communications systems include a function to compensatefor the drop in bandwidth at high optical power. This function is veryimportant to insure that the optical communications system operates inaccordance with specifications in a high optical power environment, andconsequently, the function should be tested at the wafer level. However,this function is not tested on the wafer because the mechanism of thebandwidth reduction of the PIN diode at high incident optical power isquite complex and cannot be simulated by a simple change of parallelcapacitance.

[0009] The limitations on wafer testing of electronic ICs for opticalcommunications systems, due to the inexact simulation of opticalelements, may lead to the following problems. First, some bad dies maybe passed through wafer testing, only to be found in package leveltests. The cost of inking out a bad die is relatively low, on the orderof several tens of cents, but after a die is packaged and found to bebad, the cost is on the order of several dollars at least. Consequentlypassing a bad die through wafer testing may cause a ten-fold increase inexpense due to the original manufacturing failure relative to the baddie.

[0010] Secondly, when package level testing indicates a fault in apackage, it can be difficult to determine whether the fault is due tothe electronics IC (i.e., a bad die) or problems with the opticalcomponents. Consequently, it may be necessary to undertake an expensivedebugging procedure which entails a significant amount of engineeringtime to determine the cause of the failure. It accordingly would be verydesirable to weed out all bad dies at the wafer test level. However,this is not feasible with conventional wafer testing procedures andwafer testing apparatus used in connection with electronic ICs foroptical communications systems.

[0011] It accordingly would be desirable to improve the capabilities ofwafer test equipment used in regard to electronic ICs for opticalcommunications systems with respect to representation of opticalcomponents.

[0012] It would also be desirable that the test apparatus componentswhich represent optics be capable providing a very wide range of signalpower. This is because, especially in the case of “open space” opticalcommunications devices (i.e., devices in which no optical wave guide isemployed), the incident optical power to a photo detector may vary overup to 6 orders of magnitude as the communication distance varies.

[0013] It would also be desirable that the test apparatus not providefalse indications of die failures due to aging of components of the testapparatus.

SUMMARY OF THE INVENTION

[0014] According to a first aspect of the invention, a method of testingan electronic device on a wafer is provided. The method includesgenerating an optical test signal, providing the optical test signal toa first photo detector, and supplying an electrical output of the firstphoto detector to the electronic device on the wafer.

[0015] According to a second aspect of the invention, a method oftesting an electronic device on a wafer includes driving a light sourcewith an electrical output from the electronic device on the wafer,supplying an optical output of the light source to a second photodetector, and examining an electrical signal output from the secondphoto detector.

[0016] The optical test signal may be provided to the first photodetector via a first variable optical attenuator and the optical outputof the light source may be supplied to the second photo detector via asecond variable optical attenuator.

[0017] According to a third aspect of the invention, an apparatus fortesting an electronic device on a wafer includes the following elements:

[0018] a first light source for generating an optical test signal inaccordance with a test control signal;

[0019] (b) a first variable optical attenuator coupled to the firstlight source for receiving and attenuating the optical test signal toproduce an attenuated optical test signal;

[0020] (c) a first photo detector coupled to the first variable opticalattenuator for receiving the attenuated optical test signal andconverting the attenuated optical test signal into an electrical testsignal;

[0021] (d) first probes for selectively coupling the electrical testsignal to the electronic device on the wafer;

[0022] (e) a second light source;

[0023] (f) a second probe for receiving an electrical output from theelectronic device on the wafer and selectively coupling the electricaloutput from the electronic device on the wafer to drive the second lightsource to output an optical output signal;

[0024] (g) a second variable optical attenuator coupled to the secondlight source for receiving and attenuating the optical output signal toproduce an attenuated optical output signal;

[0025] (h) a second photo detector coupled to the second opticalattenuator for receiving the attenuated optical output signal andconverting the attenuated optical output signal into an electricaldetection signal; and

[0026] (i) a first monitoring circuit coupled to the second photodetector for receiving and monitoring the electrical detection signal.

[0027] With the methods and apparatus of the present invention, a morecomplete set of wafer-level tests may be performed on electroniccircuits to be used in optical communications systems. Consequentlydefects in the electronic circuitry can be reliably detected prior topackaging, so that costs of manufacturing failures and debugging timeare reduced.

[0028] Other objects, features and advantages of the present inventionwill become more fully apparent from the following detailed descriptionof the preferred embodiments, the appended claims and the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0029]FIG. 1 is a block diagram representation of a portion of aconventional optical communications system;

[0030]FIG. 2A is a high level block diagram of a wafer testing apparatusprovided in accordance with the invention;

[0031]FIG. 2B is a block diagram that illustrates an exemplaryembodiment of the wafer testing apparatus of FIG. 2A;

[0032] FIGS. 3A-C are block diagrams that illustrate arrangements fordriving a laser that is part of the testing arrangement of FIG. 2B inaccordance with respective embodiments of the invention; and

[0033]FIGS. 4A and 4B are block diagrams that illustrate signalmonitoring arrangements that may be included in the testing apparatus ofFIG. 2B in accordance with respective embodiments of the invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

[0034] Exemplary embodiments of the invention will now be described,initially with reference with FIGS. 2A and 2B.

[0035]FIG. 2A is a high-level block diagram showing a wafer under test22 coupled to exchange electrical signals with a testing apparatus 20.Testing apparatus 20 is coupled to a wafer tester controller 18 toreceive testing control signals from the wafer tester controller 18 andto provide test result signals (e.g. monitoring signals) to the wafertester controller 18. The wafer tester controller 18 may comprise, forexample, one or more appropriately programmed microprocessors or someother suitable combination of hardware and/or software.

[0036]FIG. 2B is a more detailed block diagram showing an embodiment oftesting apparatus 20 provided in accordance with the invention. Thetesting apparatus 20 may be implemented, for example, as part of a wafertest probe station and includes optical components. Reference numeral 22again indicates the wafer under test. The wafer under test 22 may be asemiconductor wafer carrying numerous electronic ICs suitable forpackaging and use with optical components of an optical communicationssystem.

[0037] The testing apparatus 20 includes a photo detector side 21 and alight source side 23. The photo detector side 21 of the testingapparatus 20 is provided to represent a photo detector with which a dieunder test is intended to be used when installed in an opticalcommunication system. The light source side 23 of the testing apparatus20 is provided to represent a light source to be driven by the die undertest. As will be discussed below, the photo detector side 21 is usefulfor testing receiver functions of the die under test, and the lightsource side 23 is useful for testing transmitter functions of the dieunder test.

[0038] The photo detector side 21 of the testing apparatus 20 includes alaser 24. The laser 24 may be, for example, of a type that is suitableto provide a light source for an optical fiber, and having an opticaloutput of the type used in the optical communications system with whichthe dies under test are to be used. The output optical power of thelaser 24 is preferably at least 1.5 times the maximum incident intensityrequired for the downstream photo detector 28, which will be discussedbelow. The purpose of the optical power margin is to allow for insertionloss in optical couplers and other optical devices included in the photodetector side 21 of the testing apparatus 20.

[0039] The photo detector side 21 of the testing apparatus 20 alsoincludes a laser driving circuit 26. The laser driver circuit 26 isarranged to generate a suitable electric signal to drive the laser 24 toproduce an optical test signal with necessary amplitude, pulse width,rise time and fall time characteristics, in case electronic IC dies foroptical digital communication are being tested, or with suitableamplitude and frequency characteristics if electronic IC dies foroptical analog communication are being tested. Further details of thedriving arrangement of the laser 24 will be described below.

[0040] The photo detector side 21 of the testing apparatus 20 alsoincludes a first photo detector 28. Preferably the first photo detector28 is of the same type as the photo detector(s) with which theelectronic ICs under test are to be used. Consequently, the first photodetector 28 may be, for example, a PIN diode or an avalanche photo diode(APD) suitable for use with an optical fiber. The first photo detector28 preferably is pre-measured to ensure that it satisfies the standardparameters for a photo detector of its type. Such parameters may includesensitivity, bandwidth, parasitic capacitance, and parasitic resistance.First probes 30 are connected to the cathode and anode of the firstphoto detector 28 to allow electrical current signals output from thefirst photo detector 28 to be selectively coupled to the electronic ICdie under test.

[0041] In at least one embodiment, the optical test signal output fromthe laser 24 is coupled to the first photo detector 28 via an opticalcoupler 32 and a programmable variable optical attenuator 34. The laser24 and the photo detector 28 may be otherwise coupled (e.g., via awaveguide, atmosphere or some other optical communications channel aslong as the incident optical power to the photo detector can becontrolled and light source output power stability can be monitored). Asused herein, a light source and a detector are “coupled” when thedetector is configured to receive light from the light source.

[0042] In the embodiment of FIG. 2B, the optical coupler 32 is a threeterminal fiber optic device having an input terminal 36 and outputterminals 38 and 40. The input terminal 36 of the optical coupler 32 iscoupled to receive the optical test signal output from the laser 24. Theoptical coupler 32 provides the input optical test signal to its outputterminals 38, 40 with certain respective coupling ratios. For example,the coupling ratio from the input terminal 36 to the output terminal 38may be 0.99, and the coupling ratio from the input terminal 36 to theoutput terminal 40 may be 0.01. Other coupling ratios may be employed.The output terminal 38 of the optical coupler 32 is coupled to an inputof the variable optical attenuator 34. The output terminal 40 of theoptical coupler 32 is coupled to provide an attenuated portion of theoptical test signal of the laser 24 to a laser monitoring branch 42 ofthe photo detector side 21 of the testing apparatus 20. Details of thelaser monitoring branch 42 will be discussed below.

[0043] As stated above, the variable optical attenuator 34 is coupled toreceive the slightly attenuated optical test signal from the laser 24via the optical coupler 32. The variable optical attenuator 34preferably operates under control of a signal provided by wafer testercontroller 18 (FIG. 2A) to provide a range of insertion loss (e.g., 60dB or more). Accordingly, the variable optical attenuator 34 maysimulate the input dynamic range of most optical communications systems.

[0044] The laser monitoring branch 42 of the photo detector side 21 ofthe testing apparatus 20 includes a monitor photo detector 44 and aphoto detector side signal monitoring circuit 46. The monitor photodetector 44 may be any suitable photo detecting device for receiving andconverting to an electrical signal the optical signal which is outputfrom the laser 24 and coupled with attenuation by the optical coupler 32to the monitor photo detector 44. For example, the monitor photodetector 44 may be a high speed photo detector, a PIN diode or an APD.The photo detector side signal monitoring circuit 46 is coupled toreceive the electrical signal output from the photo detector 44. Thephoto detector side signal monitoring circuit 46 may be arranged tomeasure, for example, the following parameters of the optical signaloutput by the laser 24: (1) in the case of testing electronic IC diesfor optical digital communications systems, the amplitude, rise time,fall time and pulse width; and (2) in the case of testing electronic ICdies for use in optical analog communications systems, the amplitude andfrequency. Further details of possible arrangements for the signalmonitoring circuit 46 will be described below.

[0045] In one embodiment of the invention, when it is found that theoutput signal from the laser 24 fails to comply with predeterminedlimits (e.g., amplitude, rise time, fall time, pulse width, frequency,etc.), the signal monitoring circuit 46 sends a signal to the wafertester controller 18 (FIG. 2A). The wafer tester controller 18 may thentake appropriate action such as changing the degree of attenuationprovided by variable optical attenuator 34, adjusting the drive signaloutput by the laser driver 26, or sending a notice to the testingapparatus operator to advise that the laser 24 is in need ofreplacement. Accordingly, the laser monitoring branch 42 is able tomonitor variations in output of the laser 24 to correct aging of thelaser 24 or other conditions that may cause the photo detector side 21of the testing apparatus 20 to fail to provide reliable test signalinput to the wafer under test 22.

[0046] Details of the light source side 23 of the testing apparatus 20will now be described.

[0047] The light source side 23 of testing apparatus 20 includes a lightsource 50, a third photo detector 52, and a light source side signalmonitoring circuit 54. The light source 50 is selectively couplable to asecond probe 56 by a switch 58. The light source 50 is preferably astandard light source such as an LED or a laser (e.g., anOL399N-150F/P20 manufactured by OKI Semiconductor). The light source 50preferably is pre-measured to ensure it satisfies the standardparameters for a light source of its type.

[0048] Light source 50 receives via second probe 56 and switch 58 alight source driving signal output from the electronic IC die under testand converts the driving signal from the electronic IC die under testinto an optical output. The optical output from the light source 50 iscoupled to the third photo detector 52 by way of a second programmablevariable optical attenuator 60. The variable optical attenuator 60preferably provides suitable attenuation of the optical signal outputfrom the light source 50 so that the incident optical power applied tothe third photo detector 52 is set to a proper level for normaloperation of the third photo detector 52 (e.g., a level that does notsaturate the third photo detector 52). For example, the third photodetector 52 may be a high speed photo detector, a PIN diode or an APD.The third photo detector 52 converts the optical signal applied theretointo an electrical signal, which is coupled to the light source sidemonitoring circuit 54.

[0049] The light source side signal monitoring circuit 54 is arranged tomeasure the parameters of the optical signal supplied to the third photodetector 52. Since the light source 50 is known to have standard outputcharacteristics, the measurements provided by the light source sidesignal monitoring circuit 54 are indicative of the performance of alight source driver component of the electronic IC die under test.

[0050] A standard light source driver 62 is included in the light sourceside 23 of the testing apparatus 20. The light source driver 62 isselectively couplable via switch 58 to the light source 50 to exercisethe light source 50 so that it may be determined whether, due to agingor other circumstances, the light source 50 has departed from standardperformance characteristics. The exercising of the light source 50 maybe performed, for example, as part of an initialization procedure forthe testing apparatus 20, periodically or the like.

[0051] In at least one embodiment, the first photo detector 28, thelight source 50, the light source driver 62 and the switch 58 arelocated on a wafer test probe card, which is indicated by dashed outline64. The other components of the testing apparatus 20 illustrated in FIG.2B may be provided in a controller cabinet, and suitable connections tothe first photo detector 28 and the light source 50 may be made viaoptical fiber patch cords. This arrangement of limiting the number ofdevices on the wafer test probe card 64 is desirable because the wafertest probe card 64 is typically a high density PCB (printed circuitboard) on which space is limited.

[0052] Alternative embodiments of arrangements for driving the laser 24(e.g., alternative embodiments of the laser driver 26) of the photodetector side 21 of testing apparatus 20 will now be described withreference to FIGS. 3A-C. In the embodiment shown in FIG. 3A the laser 24is driven by a commercially available laser driving circuit 80 (such asa MAX3867 manufactured by MAXIM). The laser driving circuit 80 operatesunder control of a signal output from a signal generator 82. The signalgenerator 82 is controlled, in turn, by command messages from the wafertester controller 18 (FIG. 2A). The laser driving embodiment of FIG. 3Ais easy to implement since it utilizes a standard,commercially-available laser driving circuit 80,

[0053] A second, lower-cost embodiment of a laser driving arrangement isshown in FIG. 3B. The arrangement of FIG. 3B includes the signalgenerator 82 of FIG. 3A, as well as an operational amplifier 84, a powertransistor 86 and a current sample resistor 88. A voltage signal fromthe signal generator 82 is applied to the non-inverting input of theoperational amplifier 84. The output of the operational amplifier 84 iscoupled to the base of the power transistor 86. The current sampleresistor 88 is connected between the inverting input of the operationalamplifier 84 and ground. A laser diode 24 is connected between theemitter of the power transistor 86 and the inverting input of theoperational amplifier 84.

[0054] The voltage across the resistor 88 is dependent on the currentthrough the resistor 88. The feedback signal to the inverting input ofthe operational amplifier 84 forces the current waveform through thelaser diode 24 to follow the input signal provided to the non-invertinginput of the operational amplifier 84. Consequently, the input signalcontrols the waveform of the optical output of the laser diode 24.

[0055] The laser driving arrangement of FIG. 3B is suitable forrepresenting an optical system that operates at frequencies of up toabout 2.5 Gigahertz. To represent a higher speed system, such as a 10GHz system, an arrangement such as that shown in FIG. 3C may beemployed. In the arrangement of FIG. 3C, a DC source 90 drives the laser24 with a constant voltage or constant current so that the laser 24outputs a maximum constant optical power. An external optical modulator92 (e.g., a 40 Gbits/s Lithium Niobate Electro-optic Modulatormanufactured by Agere Systems) operates under control from the wafertester controller 18 (FIG. 2A) to modulate the constant optical signaloutput from the laser 24.

[0056] Alternative embodiments for arrangements of either or both of thephoto detector side signal monitoring circuit 46 and the light sourceside signal monitoring circuit 54 of FIG. 2B are illustrated in FIGS. 4Aand 4B. In both FIGS. 4A and 4B the photo detector 44 or 52 converts anoptical signal applied thereto into an electrical current signal.Operational amplifier 94 and resistor 96 together form a transimpedanceamplifier 97 which converts the electrical current signal output fromthe photo detector 44 or 52 into an electrical voltage signal. In FIG.4A a commercially available time measurement system (TMS) 98 (such as aCatalyst manufactured by Teradyne) is provided to measure parametersincluding amplitude of the voltage signal output from the transimpedanceamplifier 97 and to provide the resulting data to the wafer testercontroller 18 (FIG. 2A).

[0057] In the arrangement of FIG. 4B the voltage signal output from thetransimpedance amplifier 97 is provided to an onboard circuit thatincludes a high speed analog-to-digital (A/D) converter 100 (e.g., a 12bit, 100 MSPS A/D converter such as an ADS810 manufactured byBurr-brown), a high-speed first-in-first-out (FIFO) memory 102 (e.g., anIDT72V821L_(—)10 manufactured by Integrated Device) and a local timingcontroller 104. The local timing controller 104 may include a microcontroller such as a Motorola 68000 plus a high frequency oscillatorwith a frequency matching the FIFO memory 102.

[0058] The local timing controller 104 generates all of the timingsignals required to trigger sampling by the A/D converter 100 and tocontrol read and write operations of the FIFO memory 102. The datasamples output from the A/D converter 100 are temporarily stored in theFIFO memory 102 and then are sent to the wafer tester controller 18under the control of the local timing controller 104. The wafer testercontroller 18 can then analyze the sampled data and obtain informationconcerning the optical waveform that was applied to the photo detector44 or 52, as the case may be.

[0059] In the event that the timing resolution of the AID converter 100is not sufficiently high, a timing interleaving technique may be used bymeans of the local timing controller 104.

[0060] Operation of the testing apparatus 20 will now be described withreference to FIG. 2B. To test an electronic IC die (not shown) undertest on wafer 22 in a receiver mode, laser 24 is driven, under thecontrol of the wafer tester controller 18 (FIG. 2A), to generate anoptical test signal. For example, the wafer tester controller 18 mayprovide appropriate signals to the laser driver 26 (e.g., to the signalgenerator 82 and/or to the external modulator 92 of FIGS. 3A-C) so thatthe optical output of the laser 24 is modulated to produce the opticaltest signal. Exemplary optical test signals include a test pattern of“010101” to test the receiver frequency performance, or a pattern of“111111101” to test receiver response to a duty cycle change of areceived signal. Other test signals may be similarly employed. Theoptical test signal is coupled to the first photo detector 28 by way ofoptical coupler 32 and variable optical attenuator 34. If appropriate,the power level of the optical test signal may be adjusted at thevariable optical attenuator 34 under the control of the wafer testercontroller 18. The optical test signal provided to the first photodetector 28 is converted by the first photo detector 28 to an electricaloutput which is supplied via probes 30 to the die under test.

[0061] As noted before, the first photo detector 28 preferably ismatched to the type of photo detector with which the electronic circuitunder test is designed to operate. Furthermore, the variable opticalattenuator 34 may be controlled to provide a wide range of attenuationof the optical test signal to simulate the wide input power range thatmay be experienced by the electronic circuit under test in its operatingenvironment. Also, the performance of the laser 24 may be trackedthrough operation of the laser monitoring branch 42 of the photodetector side 21 of the testing apparatus 20 on appropriate occasions,to ensure that the laser 24 meets predetermined standard operatingparameters.

[0062] As a result of these factors, the photo detector side 21 of thetesting apparatus 20 provides a highly realistic representation of theinput side of the environment in which the electronic circuit under testis intended to operate.

[0063] Operation of the light source side 23 of the testing apparatus 20to test a transmitter mode of a die under test will now be described. Alight source driving signal output from the die under test on wafer 22is coupled via the probe 56 and the switch 58 to the light source 50.The light source 50 converts the driving signal to an optical output.The optical output of the light source 50 is coupled via variableoptical attenuator 60 to the third photo detector 52. The third photodetector 52 converts the optical signal coupled thereto into anelectrical signal, which is monitored by the light source sidemonitoring circuit 54 and analyzed by the wafer tester controller 18.

[0064] With the testing apparatus of the present invention, electroniccircuits to be used in optical communications systems can be fullytested at the wafer level so that fewer bad dies pass the wafer leveltest. Consequently, the yield at package level testing is improved.Furthermore, since defects in the electronic IC dies may be detectedduring wafer level testing, failures detected at package level testingcan be assumed to be due primarily to optical components in the package,and not due to the electronic ICs in the package. As a result, the rangeof searching to debug package level failures is reduced, with saving ofengineering time and a reduction in expenses related to debugging.

[0065] The foregoing description discloses only the preferredembodiments of the invention; modifications of the above disclosedapparatus and method which fall within the scope of the invention willbe readily apparent to those of ordinary skill in the art. For example,if only the receiver mode of an electronic IC die is to be tested, thenthe test procedures carried out by the light source side 23 of thetesting apparatus 20 may be omitted. Similarly, if only the transmittermode of an electronic IC die is to be tested, then the test procedurescarried out by the photo detector side 21 of the testing apparatus 20may be omitted. Receiver mode testing may be performed before, during orafter transmitter mode testing.

[0066] Moreover, if electronic IC dies having only receiver capabilitiesare to be tested, then the light source side 23 may be omitted from thetesting apparatus 20, and if electronic IC dies having only transmittingcapabilities are to be tested, then the photo detector side 21 may beomitted from the testing apparatus 20.

[0067] Accordingly, while the present invention has been disclosed inconnection with the preferred embodiments thereof, it should beunderstood that other embodiments may fall within the spirit and scopeof the invention, as defined by the following claims.

What is claimed is:
 1. A method of testing dies on a wafer which are tobe operated using light, the method comprising: simulating lightoperated components off of the wafer; and testing the dies on the waferwith the simulated light operated components.
 2. A method of testing anelectronic device on a wafer, comprising: generating an optical testsignal; providing the optical test signal to a photo detector; andsupplying an electrical output of the photo detector to the electronicdevice on the wafer.
 3. The method of claim 2, wherein the optical testsignal is provided to the photo detector via a variable opticalattenuator.
 4. The method of claim 2, wherein the optical test signal isgenerated in accordance with a signal generated by a test controller. 5.A method of testing an electronic device on a wafer comprising: drivinga light source with an electrical output from the electronic device onthe wafer; supplying an optical output of the light source to a photodetector; and examining an electrical signal output from the photodetector.
 6. The method of claim 5, wherein the optical output of thelight source is supplied to the photo detector via a variable opticalattenuator.
 7. A method of testing an electronic device on a wafer,comprising: generating an optical test signal; providing the opticaltest signal to a first photo detector; supplying an electrical output ofthe first photo detector to the electronic device on the wafer; drivinga light source with an electrical output from the electronic device onthe wafer; supplying an optical output of the light source to a secondphoto detector; and examining an electrical signal output from thesecond photo detector.
 8. The method of claim 7, wherein the opticaltest signal is provided to the first photo detector via a first variableoptical attenuator.
 9. The method of claim 8, wherein the optical outputof the light source is supplied to the second photo detector via asecond variable optical attenuator.
 10. The method of claim 7, whereinthe optical test signal is generated in accordance with a signalgenerated by a test controller.
 11. The method of claim 10, wherein thegenerating step includes outputting a constant amplitude optical signalfrom a laser and modulating the constant amplitude optical signal inaccordance with the signal generated by the test controller. 12.Apparatus adapted to test an electronic device on a wafer, comprising: alight source adapted to generate an optical test signal in accordancewith a test control signal; a photo detector coupled to the light sourceand adapted to receive the optical test signal and convert the opticaltest signal into an electrical test signal; and probes connected to thephoto detector and adapted to selectively couple the electrical testsignal to the electronic device on the wafer.
 13. The apparatus of claim12, further comprising a variable optical attenuator coupling the lightsource to the photo detector.
 14. The apparatus of claim 12, furthercomprising a monitoring circuit coupled to the light source and adaptedto monitor at least one parameter of the optical test signal. 15.Apparatus adapted to test an electronic device on a wafer comprising: aprobe adapted to receive an electrical driving signal output from theelectronic device on the wafer; a light source coupled to the probe andadapted to receive the electrical driving signal and to be driven tooutput an optical signal; a photo detector coupled to the light sourceand adapted to receive the optical signal and convert the optical signalto an electrical detection signal; and a monitoring circuit coupled tothe photo detector and adapted to receive and monitor the electricaldetection signal.
 16. The apparatus of claim 15, further comprising avariable optical attenuator coupling the light source to the photodetector.
 17. The apparatus of claim 15, further comprising: a drivingcircuit; and a switch adapted to selectively couple the driving circuitto the light source.
 18. Apparatus adapted to test an electrical deviceon a wafer, comprising: a first light source adapted to generate anoptical test signal in accordance with a test control signal; a firstvariable optical attenuator coupled to the first light source andadapted to receive and attenuate the optical test signal to produce anattenuated optical test signal; a first photo detector coupled to thefirst variable optical attenuator and adapted to receive the attenuatedoptical test signal and convert the attenuated optical test signal intoan electrical test signal; first probes connected to the first photodetector and adapted to selectively couple the electrical test signal tothe electronic device on the wafer; a second light source; a secondprobe adapted to receive an electrical output from the electronic deviceon the wafer and selectively couple the electrical output from theelectronic device on the wafer to drive the second light source tooutput an optical output signal; a second variable optical attenuatorcoupled to the second light source and adapted to receive and attenuatethe optical output signal to produce an attenuated optical outputsignal; a second photo detector coupled to the second optical attenuatorand adapted to receive the attenuated optical output signal and convertthe attenuated optical output signal into an electrical detectionsignal; and a first monitoring circuit coupled to the second photodetector and adapted to receive and monitor the electrical detectionsignal.
 19. The apparatus of claim 18 further comprising: athree-terminal optical coupler having an input terminal coupled to thefirst light source, a first output terminal coupled to the firstvariable optical attenuator, and a second output terminal; a third photodetector, coupled to the second output terminal of the three-terminaloptical coupler, the third photo detector adapted to receive a portionof the optical test signal generated by the first light source and toconvert said portion of the optical test signal into an electricalmonitoring signal; and a second monitoring circuit coupled to the thirdphoto detector and adapted to receive and monitor the electricalmonitoring signal.
 20. The apparatus of claim 19, further comprising: alight source driver; a switch connected to the second light source andadapted to couple the second light source to a selected one of thesecond probe and the light source driver.
 21. The apparatus of claim 20,further comprising a wafer test probe card on which the first photodetector, the switch, the light source driver and the second lightsource are mounted.
 22. The apparatus of claim 21, wherein the firstlight source, the first variable optical attenuator, the second variableoptical attenuator, the second photo detector, the first monitoringcircuit, the three-terminal optical coupler, the third photo detectorand the second monitoring circuit are not mounted on the wafer testprobe card.
 23. The apparatus of claim 18, wherein the first lightsource includes a laser, and further comprising a driving circuitadapted to drive the laser.
 24. The apparatus of claim 23, wherein thedriving circuit receives the test control signal and drives the laser inaccordance with the test control signal.
 25. The apparatus of claim 24,wherein the driving circuit includes: an operational amplifier thatreceives the test control signal at a non-inverting input of theoperational amplifier; a power transistor having its base connected toan output of the operational amplifier; and a resistor connected betweenground and an inverting input of the operational amplifier; wherein thelaser is a laser diode connected between an emitter of the powertransistor and the inverting input of the operational amplifier.
 26. Theapparatus of claim 23, wherein the driving circuit drives the laser tooutput a constant amplitude optical signal, and further comprising anoptical modulator adapted to receive the test control signal andmodulate the constant amplitude optical signal in accordance with thereceived test control signal.
 27. The apparatus of claim 18, wherein theelectrical detection signal is a current signal and the first monitoringcircuit includes: a transimpedance amplifier adapted to convert thecurrent signal to a voltage signal; and a time measurement systemadapted to measure parameters of the voltage signal.
 28. The apparatusof claim 18, wherein the electrical detection signal is a current signaland the first monitoring circuit includes: a transimpedance amplifieradapted to convert the current signal to a voltage signal; ananalog-to-digital (A/D) converter adapted to convert the voltage signalto digital data; a first-in-first-out (FIFO) memory adapted to store thedigital data; and a timing controller adapted to provide timing signalsto the A/D converter and the FIFO memory.
 29. The apparatus of claim 18,wherein the first photo detector is selected from the group consistingof a PIN diode and an avalanche photo diode (APD).
 30. The apparatus ofclaim 18, wherein the second photo detector is selected from the groupconsisting of a high speed photo diode, a PIN diode and an APD. 31.Apparatus for testing an electrical device on a wafer, comprising: afirst light source for generating an optical test signal in accordancewith a test control signal; a first variable optical attenuator coupledto the first light source for receiving and attenuating the optical testsignal to produce an attenuated optical test signal; a first photodetector coupled to the first variable optical attenuator for receivingthe attenuated optical test signal and converting the attenuated opticaltest signal into an electrical test signal; first probes connected tothe first photo detector for selectively coupling the electrical testsignal to the electronic device on the wafer; a second light source; asecond probe for receiving an electrical output from the electronicdevice on the wafer and selectively coupling the electrical output fromthe electronic device on the wafer to drive the second light source tooutput an optical output signal; a second variable optical attenuatorcoupled to the second light source for receiving and attenuating theoptical output signal to produce an attenuated optical output signal; asecond photo detector coupled to the second optical attenuator forreceiving the attenuated optical output signal and converting theattenuated optical output signal into an electrical detection signal;and a first monitoring circuit coupled to the second photo detector forreceiving and monitoring the electrical detection signal.